
P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
29 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
The following examples will help to show the versatility of this scheme.
Example 1, slave 0:
(4)
Example 2, slave 1:
(5)
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1. Slave 1 requires
a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would be 1100 0001 since a ‘1’
in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit0=0 (for slave 0) and bit1=0 (for slave 1). Thus, both could be addressed
with 1100 0000.
In a more complex system the following could be used to select slaves 1 and 2 while
excluding slave 0:
Example 1, slave 0:
Fig 18. Schemes used by the UART to detect ‘given’ and ‘broadcast’ addresses when
multiprocessor communications is enabled
002aaa527
rx_byte(7)
saddr(7)
saden(7)
rx_byte(0)
saddr(0)
.
given_address_match
logic used by UART to detect 'given address' in received data
saddr(7)
saden(7)
rx_byte(7)
saddr(0)
saden(0)
rx_byte(0)
broadcast_address_match
logic used by UART to detect 'given address' in received data
saden(0)
.
SADDR = 1100 0000
SADEN = 1111 1101
Given = 1100 00X0
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SADDR = 1100 0000
SADEN = 1111 1110
Given = 1100 000X
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